1. Field of the Invention
The present invention relates generally to a wideband power amplification apparatus and method. In particular, the present invention relates to a baseband signal predistortion apparatus and method for linearizing a nonlinear distortion characteristic caused by a power amplifier.
2. Description of the Related Art
In a conventional mobile communication system that performs communication using radio frequency (RF) signals, an RF amplifier is divided into a low-power, low-noise amplifier and a high-power transmission amplifier. In the high-power transmission amplifier, the efficiency of the high-power transmission amplifier rather than the noise it produces is an important factor that should be taken into consideration. Accordingly, a high-power amplifier (HPA) commonly used in the mobile communication system operates close to a nonlinear operation point so that it can obtain high efficiency.
To accomplish this, an output of the amplifier generates an inter-modulation distortion (IMD) component, and the inter-modulation distortion component affects not only an in-band signal but also an out-band signal as a spurious signal. In order to remove the spurious component, a feed-forward scheme is primarily used. The feed-forward scheme can almost completely remove the spurious component, but it reduces amplification efficiency and requires a control operation in an RF stage, inevitably causing an increase in size and price of the system.
Research is being performed for a digital predistortion (DPD) scheme having high efficiency and low cost. The digital predistortion scheme inverts the nonlinearity of a power amplifier at a digital stage to predistort an input signal, thereby linearizing an output signal of the power amplifier. The nonlinearity can be classified into an amplitude modulation-to-amplitude modulation (AM/AM) characteristic in which the amplitude of an output signal depends upon the amplitude of an input signal, and an amplitude modulation-to-phase modulation (AM/PM) characteristic in which a phase of an output signal depends upon the amplitude of an input signal.
A predistortion scheme using a complex polynomial as a typical predistortion scheme is used for compensating for the nonlinearity of a power amplifier. A complex polynomial-type predistorter (hereinafter referred to as a “polynomial predistorter”) uses a polynomial to calculate an inverse nonlinear distortion characteristic of the power amplifier, contributing to a reduction in time required for removing the nonlinearity of the power amplifier. That is, the polynomial predistorter has a high convergence speed. When a memory effect is not taken into consideration, a Pth—order predistortion polynomial is expressed asd(n)=x(n){a0+a1|x(n)|+a2|x(n)|2+ . . . +a(P−1)|x(n)|(P−1)}  (1)
In Equation (1), d(n) denotes a predistorted signal, and a value within { } multiplied by an input signal x(n) can be regarded as a predistortion gain.
For most predistorters, research has been performed on a single tone or a narrowband frequency signal. Therefore, most proposed predistortion schemes simply compensate for only memoryless nonlinearity (in which only a current input affects a current output) of a power amplifier. However, for memory nonlinearity of a nonlinear amplifier at a wideband frequency, not only a current input signal but also previous input signals affect a current output of the nonlinear amplifier, causing a definite change in an AM/AM characteristic and an AM/PM characteristic. Such a phenomenon is called the “memory effect,” wherein the nonlinearity of a power amplifier appears differently according to a frequency bandwidth of an input signal. With the recent increasing tendency to use a frequency band in a mobile communication system, active research is being conducted on a predistortion scheme that takes the memory effect of a nonlinear amplifier into consideration. A discrete Volterra series scheme compensates for the memory effect using a polynomial that takes previous input samples into account.
The nonlinearity removal capability of the polynomial predistorter depends upon the number of previous input samples to be taken into consideration and an order of the polynomial. Each increase in number of previous input samples to be taken into consideration causes an exponential increase in calculations. Therefore, the polynomial predistorter, although it has a high convergence speed, is very complicated in terms of a numerical formula and has many calculations. As a result, the polynomial predistorter is difficult to implement and requires a large number of fast multipliers, causing an increase in the size of a logic circuit.
There is a predistortion scheme using a look-up table (LUT) capable of solving the foregoing problem. Because the look-up table stores predistortion gains for a possible amplitude range of input signals, the look-up table-based scheme generally requires very small calculations. However, in order to correctly remove the nonlinearity of a power amplifier having the memory effect, it is necessary to apply an adaptive algorithm to each of entries, i.e., predistortion gains, stored in the look-up table, causing an increase in time required for linearizing the power amplifier, or causing a decrease in convergence speed.
As a method for linearizing a power amplifier using a predistorter to compensate for the foregoing disadvantages, there has been proposed a predistortion scheme having advantages of both the polynomial-based predistortion scheme having a high convergence speed and the look-up table-based predistortion scheme having small calculations. The proposed predistortion scheme extracts parameters of a predistorter using the polynomial predistortion scheme and converts the extracted parameters of the predistorter into a look-up table form. In this manner, the predistorter using a polynomial can have a high convergence speed which is the advantage of the polynomial predistorter and small calculations which is the advantage of the look-up table predistorter.
The proposed predistortion scheme, when parameters of a predistorter are converted into a look-up table format, multiplies the parameters by input signals according to the amplitude of the input signals by referencing particular look-up table values. Several clocks are required for determining a look-up table address according to the amplitude of an input signal, and several clocks are also required for reading data from the look-up table. For a Field Programmable Gate Array (FPGA) structure satisfying predistortion polynomial, a processor using a clock whose rate is about 10 times higher than an input sample rate of a predistorter is required. Because the maximum operating clock rate of the current FPGA is about 200 MHz, in the existing Infinite Impulse Response (IIR) structure, a predistorted input signal unavoidably has a sample rate of about 20 MHz or lower, and this sample rate is not suitable for an amplifier of a wideband base station.